At Z-zero, we find it fascinating that there has historically been so little discussion about how signal integrity–and dielectric constant and impedance–are impacted by material choices and frequency. In some ways, those were kind of like the Stone Age. Engineers of all stripes talk about FR-4 this or FR-4 that. EDA software marketers too–and 99% of them still do. We represent the 1% that believe there is a sizable gap in the PCB design world for software that bridges between the spreadsheets that are used to describe stackups and the PCB signal integrity simulation world—previously devoid of materials details—including parameters that laminate manufacturers and PCB fabricators care about. Engineers typically roll their own stackups using spreadsheets—grabbing Dk and Df values from datasheets for simulations—ignoring resin content and frequency, or rely heavily on third party fabricators to resolve final-implementation details with stackup and materials long after SI simulations were performed. Certainly, known tools have been around for years in this space, but no software on the market accessibly considered the major (known primarily by fabricators) issues surrounding stackup design combined with an accurate field solver and loss-planning environment, along with a complete dielectric materials library—and seamless interfaces to popular PCB signal integrity software—bundled in a powerful, affordably priced, easy-to-use tool. That’s how Z-planner was born.