Ascenium Inc is pioneering a disruptive approach to both significantly improving general purpose microprocessor performance as well as reducing power consumption by redefining the interface between the processor hardware and the compiler. By eliminating the Instruction Set Architecture (ISA) and leveraging bleeding edge compiler advancements to directly control a simple array of compute elements. Ascenium's Aptos processor provides tremendous cycle-by-cycle flexibility to the compiler and greater ability to exploit instruction level parallelism. Our approach enables the elimination of much of the complexity and transistor cost of standard approaches, including deep pipelining and runtime functionality such as dynamic translation, instruction fetch and execution, branch prediction, renaming, and re-ordering. Why not do more work at compile time - and then reap the power savings rewards as the program is run millions of times in the datacenter? If you are someone who hankers to work on something insanely great, something different - that can change the industry, then check out the career opportunities at our website, www.ascenium.com.