Cameron EDA can help you with.. Auto insertion of boundary handling in Verilog-AMS. Automated model generation for analog blocks in SystemVerilog and VHDL. Custom (behavioral) modeling of AMS IP for reuse. CDC detection with UVM. Modeling logic in ways to avoid X-propagation (or eliminate unnecessary reset logic). IEEE standards work for better tool interoperability - don’t hack around the problems when you don’t have to. RF modeling methodology, including use of GP-GPUs for simulation acceleration. Open source simulator work, e.g. integrating Xyce into SV/digital simulators. System simulation - integrating multiple simulators - for tackling issues like ISO 26262 validation and AI training.