Menta delivers standard-cell based, embedded FPGA IPs in RTL and GDS2 format, for SoC, ASIC or ASSP designs. Our technology lets you effortlessly update your silicon post-production, whether to fix a bug, implement customer-specific features, adapt to evolving standards, or enhance security. Menta IPs are delivered with standard EDA tools, and support process technologies and nodes from any vendor (TSMC, GF... from 350nm all the way down to 3nm).